Not applicable
1. Field of the Invention
The invention disclosed broadly relates to the field of processing semiconductor wafers, and more particularly relates to the field of ultra high vacuum (UHV) processing of batches of semiconductor wafers or films.
2. Description of the Related Art
In the last decade dynamic random access memories (DRAM""s) have been established as the driving force for increasing integration density in VLSI circuits and pushing silicon technology towards submicron devices. The consequence has been a demand on thinner semiconductor films with lower defect density and higher yield. However, as the films get thinner, the interfaces of such films are frequently a determining factor of the device performance or the yield of transistors. To improve these thin film properties, one must not only have great understanding of the interface properties of films but must so be able to control and monitor them. Currently, most of the existing batch tool sets in the whole semiconductor industry are single hot wall tubes for dielectric growth/deposition. Each dielectric film, as it comes out from processing tubes, immediately contacts atmospheric environment, (i.e., air, water vapor and particles) and the interface of this film is contaminated quickly. For example, a thermally grown 20 A (Angsrom) gate oxide is contaminated by water vapor and particles in the air when it is transferred from the oxide furnace to others before poly-Si gate is deposited. Furthermore, because this gate oxide is so thin, both contaminated interfaces (Si/oxide and oxide/poly-Si interfaces) play a crucial role in the electrical characteristics of devices. Thus, the resulting device performance and yield are likely to be poor. An integrated in situ cluster tool is needed to avoid all the contamination issues. Applied Materials Inc., of Santa Clara Calif. recently marketed a Centura Cluster tool with three chambers to deal exclusively with these film interface contamination issues so that device performance and yield can be enhanced. However, there are several shortcomings in this system design. To begin, the chamber is a single wafer chamber using at least one heat lamp design which does not produce very uniform heating. A more uniform heating method is required. In addition, the design of the Centura Cluster tool consists of a continuous rotating chuck to rotate the wafer so as to improve heat uniformity across the wafer, however, this increases the chance of particle generation. Therefore, a need exists to provide an in situ cluster tool to overcome this problem.
Another potential problem with integrated cluster tools is wafer thermal shock when processed at 700 to 1000 degrees Celsius then transported by a cold transfer mechanism causing thermal cracking of wafers. These high process temperatures combined with use of larger wafer sizes, such as 12 inches, produces wafer sagging and warping. In addition, rapid change of temperature induces stress in films causing degradation of the device""s performance. Other in situ providers of integrated equipment have used vertical furnaces but process temperature between 1100-1350 degrees Celsius can produce wafer sagging and warping. Accordingly, a need exists to provide an in situ cluster tool to overcome this sagging problem.
Still, another shortcoming with present integrated cluster tools is the environment used to transfer wafers between processing chambers. The environment, or more specifically the pressure in this environment, is too high. It is common for this pressure to be in the range of 1-760 torr, so contamination such as H2O and O2 still occurs at these higher pressure levels. Therefore, a need exists to overcome this contamination problem during the transfer of wafers between processing chambers.
Yet, still another shortcoming with present integrated cluster tools is that an atmospheric furnace equivalent oxidation chamber is not offered. Without such an oxidation chamber, a complete transistor gate stack formation can not be fabricated in one tool. Accordingly, a need exists for a batch processing system that overcomes the above problems.
A semiconductor cluster tool for executing several process steps such as CVD, Growth and Oxidation sequentially without intermediate exposure to ambient air. A UHV transfer chamber connects a plurality of UHV process chambers with an UHV transfer mechanism to enable the growth of a complete gate stack. The vacuum in each processing chamber can be matched to the pressure of the transfer chamber to reduce exposure to contaminates such as H2O and other particles to less than a monolayer. Furthermore, before any wafers are placed into the transfer chamber, they are loaded into an UHV load/unload chamber, which is the sole connection to the ambient air. The UHV load/unload chamber can be purged and pumped so as to minimize particles and contamination.